Dual Slope Converters

(Published Dec. 2007, Update May 13 2017)

Motivation

The target of dual slope converters is to make the circuit independent of the production spread of frequency references, capacitor or resistor absolute values etc. Being independent of device parameters opens the door to cheap and fairly accurate measurement systems.

Basic Concept

In a dual slope converter a capacitor is charged reference current for a certain time. The current charging the capacitor is generated using the input voltage and a resistor R. The charging time is fixed (for instance 16384 clock cycles) During measurement the capacitor is discharged using a current generated from the same resistor and the reference voltage. The time Tdown needed for discharging the capacitor is proportional to the ratio between the measured voltage and the reference voltage.

Voltage at the end of charging:

    VC = Tup * Vin/ (R*C)

Time needed for discharge:

    Tdown = VC * R * C / Vref

So the input voltage Vin calculates as:

    Vin = Vref * Tdown / Tup

All technology dependent parameters (R, C) are canceled and the precission of the measurement only depends on the stability of the clock frequency and the accuracy of Vref.

Circuit
The following figure presents the circuit for the dual slope conversion.
dual_slope_ADC.gif
Fig. 1: Dual slope converter

Before starting conversion signal reset clears the counter and discharges capacitor C closing switch SW1.
Next signal MEASURE closes switch SW2 (SW1 is already open again). The input voltage chages C via reference resistor R. The SW2 opens and SW3 closes thus discharging C. The time needed for the output of amplifier OP to return to 0 is proportional to the voltage ratio between Vin and Vref.
dual_slope_pulse.gif
Fig. 2: Pulse diagram of the dual slope converter

Nice, but why do we allow negative voltages. Why don't we just mirror the currents as needed to operate with only one supply?
Current mirrors - especially when operated close to 0 uA - have significant errors. Carfully designed dual slope concverters can be a accurate as 20bit (6 decimal digits). A current mirror would destroy much of what we gained using dual slope conversion!
The resistor R can also be implemented using a capacitor transfering a certain charge at each clockedge. (This may be more attractive for IC design than integrating high resistor values but also adds disadvantages such as clock feed through)

Limitations

Conversion may need thousands of clock edges (depending on the required accuracy). So these converters can be used for DC and very slow signals (up to some 10Hz).

Literature:

Intersil semiconductors, ICL7135 data sheet (about 1985)
Intersil semiconductors, ICL7104 and ICL8068 datasheet (about 1985)

(These datasheets additionally explain features such as auto zero and polarity detection. Very nice for learning further details)